The board flags are saved in the SPROM but some are also initialised when the driver is started.
Board Flags Workarounds on Startup
Board |
Workaround |
Vendor: Dell, Product ID: 0x4301, Revision: 0x74 |
BFL_BTCOEXIST is applied unconditionally |
Vendor: Apple, Board Type: 0x4E, Revision: > 0x40 |
BFL_PACTRL is applied unconditionally |
Board Flags
These are the known flags, compiled from the sources Linksys shipped and other sources:
FLAG |
Name |
Function |
0x00000001 |
BFL_BTCOEXIST |
Board implements Bluetooth coexistance |
0x00000002 |
BFL_PACTRL |
Board has gpio 9 controlling the PA |
0x00000004 |
BFL_AIRLINEMODE |
Board implements gpio13 radio disable indication |
0x00000008 |
BFL_RSSI |
Board has the rssi ADC divider |
0x00000010 |
BFL_ENETSPI |
Board has ephy roboswitch spi |
0x00000020 |
BFL_XTAL |
Not ok to power down the chip pll and oscillator |
0x00000040 |
BFL_CCKHIPWR |
Board can do high-power CCK transmission |
0x00000080 |
BFL_ENETADM |
Board has ADMtek switch |
0x00000100 |
BFL_ENETVLAN |
Board can do vlan |
0x00000200 |
BFL_AFTERBURNER |
Board supports Afterburner mode |
0x00000400 |
BFL_NOPCI |
Board leaves PCI floating |
0x00000800 |
BFL_FEM |
Board supports the Front End Module |
0x00001000 |
BFL_EXTLNA |
Board has an external LNA |
0x00002000 |
BFL_HGPA |
Board has a high gain PA |
0x00004000 |
BFL_BTCMOD |
BFL_BTCOEXIST is given in alternate GPIOs |
0x00008000 |
BFL_ALTIQ |
Alternate I/Q settings |
0x00010000 |
BFL_NOPA |
has no PA |
0x00020000 |
BFL_RSSIINV |
RSSI uses positive slope (not TSSI) |
0x00040000 |
BFL_PAREF |
uses the PARef LDO |
0x00080000 |
BFL_3TSWITCH |
uses a triple throw switch shared with bluetooth |
0x00100000 |
BFL_PHASESHIFT |
can support phase shifter |
0x00200000 |
BFL_BUCKBOOST |
has buck/booster |
0x00400000 |
BFL_FEM_BT |
has FEM and switch to share antenna with bluetooth |
0x00800000 |
BFL_NOCBUCK |
|
0x02000000 |
BFL_PALDO |
|
0x10000000 |
BFL_EXTLNA_5GHz |
Board has an external LNA (5 GHz mode) |
Board flags 2:
FLAG |
Name |
Function |
0x00000001 |
BFL2_RXBB_INT_REG_DIS |
external RX BB regulator present |
0x00000002 |
BFL2_APLL_WAR |
alternative A-band PLL settings implemented |
0x00000004 |
BFL2_TXPWRCTRL_EN |
permits enabling TX Power Control |
0x00000008 |
BFL2_2X4_DIV |
2x4 diversity switch |
0x00000010 |
BFL2_5G_PWRGAIN |
supports 5G band power gain |
0x00000020 |
BFL2_PCIEWAR_OVR |
overrides ASPM and Clkreq settings |
0x00000040 |
BFL2_CAESERS_BRD |
is Caesers board (unused) |
0x00000080 |
BFL2_BTC3WIRE |
used 3-wire bluetooth coexist |
0x00000100 |
BFL2_SKWRKFEM_BRD |
4321mcm93 uses Skyworks FEM |
0x00000200 |
BFL2_SPUR_WAR |
has a workaround for clock-harmonic spurs |
0x00000400 |
BFL2_GPLL_WAR |
altenative G-band PLL settings implemented |
0x00001000 |
BFL2_SINGLEANT_CCK |
transmit CCK packets on Ant. 0 only |
0x00002000 |
BFL2_2G_SPUR_WAR |
WAR to reduce and avoid clock-harmonic spurs in 2G |
0x00010000 |
BFL2_GPLL_WAR2 |
Flag to widen G-band PLL loop b/w |
0x00020000 |
BFL2_IPALVLSHIFT_3P3 |
|
0x00040000 |
BFL2_INTERNDET_TXIQCAL |
Use internal envelope detector for TX IQCAL |
0x00080000 |
BFL2_XTALBUFOUTEN |
Keep the buffered Xtal output from radio "ON". |