Enabling the Radio

A PHYs

  1. Write 0xC0 to Radio Register 0x4

  2. Write 0x08 to Radio Register 0x5

  3. Turn off bit 0x08 in PHY Registers 0x10 and 0x11

  4. Perform a 2060 Radio Init

B / G / LP PHYs

  1. If the Wireless Core revision is 5 or greater

    1. Write 0 to PHY Register 0x811

  2. Otherwise

    1. Write 0x800 to PHY Register 0x15

    2. Write 0xC00 to PHY Register 0x15

    3. Delay for 250 uSec

    4. Write 0x8000 to PHY Register 0x15

    5. Write 0xC000 to PHY Register 0x15

    6. If Core Flags has the G Mode Enable flag (0x20000000) set or the PHY Revision is 2 or greater

      1. Write 0xC0 to PHY Register 0x15

    7. Otherwise

      1. Write 0 to PHY Register 0x15

    8. Delay for 550 uSec
    9. Perform a Synthetic PU workaround
    10. Set the channel to the current channel

N PHY

  1. Perform an NPHY Radio Init

Disabling the Radio

APHYs

  1. Write 0xFF to Radio Register 0x4

  2. Write 0xFB to Radio Register 0x5

  3. OR PHY Registers 0x10 and 0x11 with 0x8

B / G / LP PHYs

  1. If the Wireless Core revision is 5 or greater

    1. OR PHY Register 0x811 with 0x8C

    2. AND PHY Register 0x812 with 0xFF73

  2. Otherwise

    1. Write 0xAA00 to PHY Register 0x15

N PHYs

1. Unset bit 0x800 in PHY Register 0x78

802.11/Radio (last edited 2008-09-06 11:51:22 by JohannesBerg)