Switch Radio (bool on)
- If bit 1 is set in MMIO Register 0x120 (MAC Control)
- Error
- If this is an N PHY
- If on
If PHY Revision >= 3
Call PHY Radio Init 2056
Call PHY PostInit 2056
Call PHY Set Channel Spec with radio_chanspec as argument
- Otherwise
Call PHY Radio Init 2055
- Otherwise
- Clear bit 0x0400 in PHY Register 0x78
If PHY Revision >= 3
- Clear bit 0x2 in Radio Register 0x09
- Write 0 to Radio Register 0x204D
- Write 0 to Radio Register 0x2053
- Write 0 to Radio Register 0x2058
- Write 0 to Radio Register 0x205E
- Clear bits 0xF0 in Radio Register 0x2062
- Write 0 to Radio Register 0x2064
- Write 0 to Radio Register 0x304D
- Write 0 to Radio Register 0x3053
- Write 0 to Radio Register 0x3058
- Write 0 to Radio Register 0x305E
- Clear bits 0xF0 in Radio Register 0x3062
- Write 0 to Radio Register 0x3064
- If on
- Else if this is an LP PHY
- If on
If the PHY Revision >= 2
- Clear bits 0x1F00 in PHY Register 0x44C
- Clear bits 0x0808 in PHY Register 0x4B0
- Otherwise
- Clear bits 0x1F00 in PHY Register 0x44C
- Clear bits 0x0018 in PHY Register 0x4B0
- Otherwise
If PHY Revision >= 2
- Clear bits 0x7C00 in PHY Register 0x44D
- Set bits 0x1F00 in PHY Register 0x44C
- Clear bits 0x7F00 in PHY Register 0x4B7
- Clear bit 0x2000 in PHY Register 0x4B1
- Set bit 0x0808 in PHY Register 0x4B0
- Otherwise
- Clear bits 0x1F00 in PHY Register 0x44D
- Set bits 0x1F00 in PHY Register 0x44C
- Clear bits 0x0300 in PHY Registers 0x4B1
- Set bits 0x0018 in PHY Register 0x04B0
- If on
- Else if this is an SSLPN PHY
- if on
- Clear bits 0x1F00 in PHY Register 0x44C
- Clear bits 0x0808 in PHY register 0x4B0
- Otherwise
- Clear bits 0x7C00 in PHY Register 0x44D
- Set bits 0x1F00 in PHY Register 0x44C
- Clear bits 0x7F00 in PHY Register 0x4B7
- Set bits 0x0808 in PHY Register 0x4B0
- if on
This routine has some stuff for A and G PHY models, but this is ignored.