N PHY Chanspec Setup (struct nphy_sfo_cfg *inp, u16 chanspec)
struct nphy_sfo_cfg {
- uint16 PHY_BW1a; uint16 PHY_BW2; uint16 PHY_BW3; uint16 PHY_BW4; uint16 PHY_BW5; uint16 PHY_BW6;
};
- Set tmp to PHY Register 0x09 anded with 1
- (If chanspec is for 5 GHz) and (tmp is zero)
- Set tmp1 to the contents of MMIO Register 0x492
- Write (tmp1 | 4) to MMIO Register 0x492
- Set bits 0xC000 in PHY Register 0xC01
- Write tmp1 to MMIO Register 0x492
- Set bit 0x0001 to PHY Register 0x09
- Else if (chanspec is NOT for 5 GHz) and (tmp is not zero)
- Clear bit 0x0001 in PHY Register 0x09
- Set tmp1 to the contents of MMIO Register 0x492
- Write (tmp1 | 4) to MMIO Register 0x492
- Clear bits 0xC000 in PHY Register 0xC01
- Write tmp1 to MMIO Register 0x492
Write inp->PHY_BW1a to PHY Register 0x1CE
Write inp->PHY_BW2 to PHY Register 0x1CF
Write inp->PHY_BW3 to PHY Register 0x1D0
Write inp->PHY_BW4 to PHY Register 0x1D1
Write inp->PHY_BW5 to PHY Register 0x1D2
Write inp->PHY_BW6 to PHY Register 0x1D3
- Extract the channel from the chanspec and save as tmp
- If the chanspec is for 5 GHz
- Set bit 0x0100 in tmp
- If the chanspec is for 40 MHz band width
- Set bit 0x0200 in tmp
Call PHY BMAC Write Shared Memory with 0xA0, tmp as arguments
If the channel into in radio_chanspec is 14
Call N PHY Classifier with 2, 0 as arguments
- Set bit 0x0800 in PHY Register 0xC0A
- Otherwise
Call N PHY Classifier with 2, 2 as arguments
- If the band in chanspec is 2 GHz
- Clear bits 0x840 in PHY Register 0xC0A
If nphy_txpwrctrl is zero
Call N PHY TX Power Fix
- If PHY Revision less than 3
Call N PHY TX LPF BW
If PHY Revision >= 3 and phy_spuravoid is not zero
- Set avoid to 0
- Set tmp to the channel in chanspec
If the band width in radio_chanspec is not 40 MHz
- If (tmp greater than 4 and tmp less than 9) or tmp is 13 or tmp is 14
- Set avoid to 1
- If (tmp greater than 4 and tmp less than 9) or tmp is 13 or tmp is 14
- Otherwise
If nphy_aband_spurwar_en and (tmp is 38 or tmp is 102 or tmp is 118)
- If the chip is 0x4716 and the chip package is 9
- Set avoid to 0
- Otherwise
- Set avoid to 1
- If the chip is 0x4716 and the chip package is 9
If phy_spuravoid is 2
- Set avoid to 1
Call PMU Spur Avoid with avoid as argument
- If the chip ID is 43222, 43224 or 43225
- If avoid
- Write 0x5341 to MMIO address 0x62E
- Write 0x0008 to MMIO address 0x630
- Otherwise
- Write 0x8889 to MMIO address 0x62E
- Write 0x0008 to MMIO address 0x630
- If avoid
- If the PHY Revision is 3 or 4
- If avoid
- Set bit 0x8000 in PHY Register 0x01
- Otherwise
- Clear bit 0x8000 in PHY Register 0x01
Call N PHY Reset CCA
Set phy_isspuravoid to avoid
- Write 0x3830 to PHY Register 0x17E