Finding the NRSSI Slope
- If the Radio Revision is 9 or greater
- Return, there's nothing to do
- If the Radio Revision is 8
Write the saved NRSSI Slope Offset to Radio Register 0x7B
Disable Collision Resolution Signaling in the A PHY CRS0 Register (0x429) by unsetting bit 0x8000
Unset the CCK and ODFM bits in the Classify Control G PHY Extended Register (0x802)
Backup Core Register 0x3E2
OR Core Register 0x3E2 with 0x8000
Backup Core Registers 0x3E6 and 0x3F4
Backup Radio Registers 0x7A, 0x52, and 0x43
Backup PHY Registers 0x15, 0x5A, 0x59 and 0x58
- If Hardware Power Control is enabled
Backup PHY Registers 0x2E, 0x2F, 0x80F, 0x810, 0x801, 0x60, 0x14 and 0x478
Write 0 to PHY Register 0x2E
Write 0 to PHY Register 0x2F
Write 0 to PHY Register 0x80F
Write 0 to PHY Register 0x810
Write 0x100 to PHY Register 0x478
Write 0x40 to PHY Register 0x801
Write 0x40 to PHY Register 0x60
Write 0x200 to PHY Register 0x14
OR Radio Register 0x7A with 0x70
Set All G PHY Gains with an LNA value of 0, a PGA value of 8, a TR value of 0
AND Radio Register 0x7A with 0xF7
- If the PHY Revision is 2 or greater
OR PHY Register 0x811 with 0x30
MaskSet PHY Register 0x812 with mask 0xFFCF and set with 0x10
OR Radio Register 0x7A with 0x80
- Delay for 20 uSec
Read PHY Register 0x47F and right shift this value by 8, this is the Maximum RSSI value
- AND the Maximum RSSI value with 0x3F
- If the Maximum RSSI value is 0x20 or greater
- Subtract 0x40 from the Maximum RSSI value
AND Radio Register 0x7A with 0x7F (changed from 0x80 based on 4.174.64.19)
If the Analog Core Revision is 2 or greater
MaskSet PHY Register 0x3 with mask 0xFF9F and set with 0x40
OR Core Register 0x3F4 with 0x2000
OR Radio Register 0x7A with 0xF
Write 0xF330 to PHY Register 0x15
- If the PHY Revision is 2 or greater
MaskSet PHY Register 0x812 with mask 0xFFCF and set with 0x20
MaskSet PHY Register 0x811 with mask 0xFFCF and set with 0x20
Set All G PHY Gains with an LNA value of 3, a PGA value of 0, a TR value of 1
- If the Radio Revision is 8
Write 0x1F to Radio Register 0x43
- Otherwise
MaskSet Radio Register 0x52 with mask 0xFF0F and set 0x60
MaskSet Radio Register 0x43 with mask 0xFFF0 and set 0x9
Write 0x480 to PHY Register 0x5A
Write 0x810 to PHY Register 0x59
Write 0xD to PHY Register 0x58
- Delay for 20 uSec
Read PHY Register 0x47F and right shift this value by 8, this is the Minimum RSSI value
- AND the Minimum RSSI value with 0x3F
- If the Minimum RSSI value is 0x20 or greater
- Subtract 0x40 from the Minimum RSSI value
- If the Minimum RSSI value equals the Maximum RSSI value
- The NRSSI Slope Scale is 0x10000
- Otherwise
- The NRSSI Slope Scale is 0x400000 / (the Maximum RSSI value - the Minimum RSSI value)
If the Maximum RSSI value is >= -4
- Save the Maximum and Minimum RSSI values for use later
- If Hardware Power Control is enabled
Restore PHY Registers 0x2E, 0x2F, 0x80F, 0x810
Restore Radio Register 0x7A
Restore Core Register 0x3E2
Restore PHY Register 0x15
- If the PHY Revision is 2 or greater
AND PHY Register 0x812 with 0xFFCF
AND PHY Register 0x811 with 0xFFCF
Restore Core Registers 0x3E6 and 0x3F4
Restore Radio Registers 0x52 and 0x43
Restore PHY Registers 0x5A, 0x59 and 0x58
Perform a SynthPU Workaround with the current channel
Set the CCK and ODFM bits in the Classify Control G PHY Extended Register (0x802)
Set the G PHY Original Gains
Enable Collision Resolution Signaling in the A PHY CRS0 Register (0x429) by setting bit 0x8000
- If Hardware Power Control is enabled
Restore PHY Registers 0x801, 0x60, 0x14 and 0x478
- NRSSI Table Modification
- Set NRSSI Threshold
Setting the NRSSI Threshold
If (Core Flags doesn't have the G Mode Enable flag (0x20000000) set and the PHY Revision isn't 2 or greater) or Board Flags doesn't have the ADC RSSI divider flag set
- Read the G PHY NRSSI table entry 32 (signed 6-bit value!)
- If the absolute value of the table entry value is 3 or larger
- The N1 Threshold and N2 Threshold values are -21 and -19 respectively
- Otherwise
- The N1 Threshold and N2 Threshold values are -25 and -21 respectively
- Otherwise, the N1 Threshold and N2 Threshold have to be calculated as follows:
- Start with B1 Threshold and B2 Threshold of -13 and -10 respectively
- If the interference mitigation is set to non-WLAN
- The B1 Threshold and B2 Thresholds are -13 and -17 respectively
- If the interference mitigation is in Automatic or Manual mode and FIXME
- The B1 Threshold and B2 Thresholds are -8 and -9 respectively
- Find the difference between the saved Maximum RSSI and the saved Minimum RSSI. this is the RSSI Delta
- Add 0x1B to the B1 Threshold value and multiply by the RSSI Delta, this is the N1 Threshold value
- Add the Minimum RSSI value left shifted by 6 to the N1 Threshold value
- If the N1 Threshold value is less than 0
- FIXME
- Otherwise
- FIXME
- Divide the N1 Threshold value by 64
- Add 0x1B to the B2 Threshold value and multiply by the RSSI Delta, this is the N2 Threshold value
- Add the Minimum RSSI value left shifted by 6 to the N2 Threshold value
- If the N2 Threshold value is less than 0
- FIXME
- Otherwise
- FIXME
- Divide the N2 Threshold value by 64
- Clamp the N1 and N2 Threshold values between [-32,31]
- Left shift the N1 Threshold value AND'd with 0x3F by 6 and OR the result with the N2 Threshold value AND'd with 0x3F
MaskSet PHY Register 0x48A with mask 0xF000 and set with the result
Update the NRSSI Table
Take each value of the NRSSI table (note that they are 6-bit signed values!), subtract the desired delta and write it back (noting that it must be clamped to a signed 6-bit value!)