PMU Res Masks (u32 *pmin, u32 *pmax)
- Set u32 min_mask and max_mask to 0
Set rsrcs to (PMU Capabilities & 0x1F00) right shifted by 8
- If Chip ID is 0x4328
- Set min_mask to 0x10003
- Set max_mask to 0xFFFFF
- Else if Chip ID is 0x5354
- Set max_mask to 0xFFFFF
- Else if Chip ID is 0x4325
If Chip revision < 2
- Set min_mask to 0x402
If Chipcommon status & 0x200 is not zero
- Set bit 0x10 in min_mask
Calculate ~(~0 << rsrcs) and save in max_mask
- Else if Chip ID is 0x4312
- Set min_mask to 0xCBB
- Else if Chip ID is 0x4322, 0xA8D5, or 0xA8DF (How are these 0xA8DX IDs generated?)
If Chip revision < 2
- Set min_mask to 0x1FD
- Set max_mask to 0x1FF
- Set *pmin to min_mask
- Set *pmax to max_mask