PHY Radio 2055 Setup (struct chan_info_nphy *inp)

1. Write the inp entries for Radio Registers 0x35, 0x3B, 0x3C and 0x51 to the respective Radio Registers
2. If the bus is PCI and PHY Revision less than 3
   1. Do a read of the MAC Control register
3. Write the inp entries for Radio Registers 0x40, 0x41, 0x32 and 0x36 to the respective Radio Registers
4. If the bus is PCI and PHY Revision less than 3
   1. Do a read of the MAC Control register
5. Write the inp entries for Radio Registers 0x34, 0x55, 0x56 and 0x57 to the respective Radio Registers
6. If the bus is PCI and PHY Revision less than 3
   1. Do a read of the MAC Control register
7. Write the inp entries for Radio Registers 0x5F, 0x60, 0x67 and 0x7F to the respective Radio Registers
8. If the bus is PCI and PHY Revision less than 3
   1. Do a read of the MAC Control register
9. Write the inp entries for Radio Registers 0x82, 0x8E, 0x8F and 0x96 to the respective Radio Registers
10. If the bus is PCI and PHY Revision less than 3
    1. Do a read of the MAC Control register
11. Write the inp entries for Radio Registers 0xAE, and 0xB1 to the respective Radio Registers
12. Delay 50 usec
13. Write 0x05 to Radio Register 0x49
14. Write 0x45 to Radio Register 0x49
15. If the bus is PCI and PHY Revision less than 3
    1. Do a read of the MAC Control register
16. Write 0x65 to Radio Register 0x49
17. Delay 300 usec