## N PHY Scale Offset RSSI (u16 scale, s8 offset, u8 core, u8 rail, u8 type)

- Make offset be in the range -32, 31 (a 6-bit signed quantity)
Set tmp to ((scale & 0x3F) << 8) | (offset & 0x3F)

- If (core is 1 OR core is 5) AND (rail is 0) AND (type is 2)
- Write tmp to PHY Register 0x1A6

- If (core is 1 OR core is 5) AND (rail is 1) AND (type is 2)
- Write tmp to PHY Register 0x1AC

- If (core is 2 OR core is 5) AND (rail is 0) AND (type is 2)
- Write tmp to PHY Register 0x1B2

- If (core is 2 OR core is 5) AND (rail is 1) AND (type is 2)
- Write tmp to PHY Register 0x1B8

- If (core is 1 OR core is 5) AND (rail is 0) AND (type is 0)
- Write tmp to PHY Register 0x1A4

- If (core is 1 OR core is 5) AND (rail is 1) AND (type is 0)
- Write tmp to PHY Register 0x1AA

- If (core is 2 OR core is 5) AND (rail is 0) AND (type is 0)
- Write tmp to PHY Register 0x1B0

- If (core is 2 OR core is 5) AND (rail is 1) AND (type is 0)
- Write tmp to PHY Register 0x1B6

- If (core is 1 OR core is 5) AND (rail is 0) AND (type is 1)
- Write tmp to PHY Register 0x1A5

- If (core is 1 OR core is 5) AND (rail is 1) AND (type is 1)
- Write tmp to PHY Register 0x1AB

- If (core is 2 OR core is 5) AND (rail is 0) AND (type is 1)
- Write tmp to PHY Register 0x1B1

- If (core is 2 OR core is 5) AND (rail is 1) AND (type is 1)
- Write tmp to PHY Register 0x1B7

- If (core is 1 OR core is 5) AND (rail is 0) AND (type is 6)
- Write tmp to PHY Register 0x1A7

- If (core is 1 OR core is 5) AND (rail is 1) AND (type is 6)
- Write tmp to PHY Register 0x1AD

- If (core is 2 OR core is 5) AND (rail is 0) AND (type is 6)
- Write tmp to PHY Register 0x1B3

- If (core is 2 OR core is 5) AND (rail is 1) AND (type is 6)
- Write tmp to PHY Register 0x1B9

- If (core is 1 OR core is 5) AND (rail is 0) AND (type is 3)
- Write tmp to PHY Register 0x1A8

- If (core is 1 OR core is 5) AND (rail is 1) AND (type is 3)
- Write tmp to PHY Register 0x1AE

- If (core is 2 OR core is 5) AND (rail is 0) AND (type is 3)
- Write tmp to PHY Register 0x1B4

- If (core is 2 OR core is 5) AND (rail is 1) AND (type is 3)
- Write tmp to PHY Register 0x1BA

- If (core is 1 OR core is 5) AND (type is 4)
- Write tmp to PHY Register 0x1A9

- If (core is 2 OR core is 5) AND (type is 4)
- Write tmp to PHY Register 0x1B5

- If (core is 1 OR core is 5) AND (type is 5)
- Write tmp to PHY Register 0x1AF

- If (core is 2 OR core is 5) AND (type is 5)
- Write tmp to PHY Register 0x1BB