N PHY Scale Offset RSSI (u16 scale, s8 offset, u8 core, u8 rail, u8 type)

1. Make offset be in the range -32, 31 (a 6-bit signed quantity)

2. Set tmp to ((scale & 0x3F) << 8) | (offset & 0x3F)

3. If (core is 1 OR core is 5) AND (rail is 0) AND (type is 2)
   1. Write tmp to PHY Register 0x1A6
4. If (core is 1 OR core is 5) AND (rail is 1) AND (type is 2)
   1. Write tmp to PHY Register 0x1AC
5. If (core is 2 OR core is 5) AND (rail is 0) AND (type is 2)
   1. Write tmp to PHY Register 0x1B2
6. If (core is 2 OR core is 5) AND (rail is 1) AND (type is 2)
   1. Write tmp to PHY Register 0x1B8
7. If (core is 1 OR core is 5) AND (rail is 0) AND (type is 0)
   1. Write tmp to PHY Register 0x1A4
8. If (core is 1 OR core is 5) AND (rail is 1) AND (type is 0)
   1. Write tmp to PHY Register 0x1AA
9. If (core is 2 OR core is 5) AND (rail is 0) AND (type is 0)
   1. Write tmp to PHY Register 0x1B0
10. If (core is 2 OR core is 5) AND (rail is 1) AND (type is 0)
    1. Write tmp to PHY Register 0x1B6
11. If (core is 1 OR core is 5) AND (rail is 0) AND (type is 1)
    1. Write tmp to PHY Register 0x1A5
12. If (core is 1 OR core is 5) AND (rail is 1) AND (type is 1)
    1. Write tmp to PHY Register 0x1AB
13. If (core is 2 OR core is 5) AND (rail is 0) AND (type is 1)
    1. Write tmp to PHY Register 0x1B1
14. If (core is 2 OR core is 5) AND (rail is 1) AND (type is 1)
    1. Write tmp to PHY Register 0x1B7
15. If (core is 1 OR core is 5) AND (rail is 0) AND (type is 6)
    1. Write tmp to PHY Register 0x1A7
16. If (core is 1 OR core is 5) AND (rail is 1) AND (type is 6)
    1. Write tmp to PHY Register 0x1AD
17. If (core is 2 OR core is 5) AND (rail is 0) AND (type is 6)
    1. Write tmp to PHY Register 0x1B3
18. If (core is 2 OR core is 5) AND (rail is 1) AND (type is 6)
    1. Write tmp to PHY Register 0x1B9
19. If (core is 1 OR core is 5) AND (rail is 0) AND (type is 3)
    1. Write tmp to PHY Register 0x1A8
20. If (core is 1 OR core is 5) AND (rail is 1) AND (type is 3)
    1. Write tmp to PHY Register 0x1AE
21. If (core is 2 OR core is 5) AND (rail is 0) AND (type is 3)
    1. Write tmp to PHY Register 0x1B4
22. If (core is 2 OR core is 5) AND (rail is 1) AND (type is 3)
    1. Write tmp to PHY Register 0x1BA
23. If (core is 1 OR core is 5) AND (type is 4)
    1. Write tmp to PHY Register 0x1A9
24. If (core is 2 OR core is 5) AND (type is 4)
    1. Write tmp to PHY Register 0x1B5
25. If (core is 1 OR core is 5) AND (type is 5)
    1. Write tmp to PHY Register 0x1AF
26. If (core is 2 OR core is 5) AND (type is 5)
    1. Write tmp to PHY Register 0x1BB