N PHY Adjust CRS Min Power (u8 power)

1. If PHY Revision >= 3

   1. If the current channel is 11 and the current channel width is 40 MHz

      1. If pi->nphy_crsminpwr_adjusted is zero

         1. Read PHY Register 0x27D and save as tmp

         2. Write tmp & 0xFF to nphy_crsminpwr[0]

         3. Write tmp & 0xFF00 | power to PHY Register 0x27D

         4. Read PHY Register 0x280 and save as tmp

         5. Write tmp & 0xFF to nphy_crsminpwr[1]

         6. Write tmp & 0xFF00 | power to PHY Register 0x280

         7. Read PHY Register 0x283 and save as tmp

         8. Write tmp & 0xFF to nphy_crsminpwr[2]

         9. Write tmp & 0xFF00 | power to PHY Register 0x283

         10. Set nphy_crsminpwr_adjusted to 1

   2. Otherwise

      1. If pi->nphy_crsminpwr_adjusted is not zero

         1. Read PHY Register 0x27D and save as tmp

         2. Write tmp & 0xFF00 | nphy_crsminpwr[0] to PHY Register 0x27D

         3. Read PHY Register 0x280 and save as tmp

         4. Write tmp & 0xFF00 | nphy_crsminpwr[1] to PHY Register 0x280

         5. Read PHY Register 0x283 and save as tmp

         6. Write tmp & 0xFF00 | nphy_crsminpwr[2] to PHY Register 0x283

         7. Set nphy_crsminpwr_adjusted to 0