bcm-v4

[Specification

Revision 6 B PHY and 2.4GHz Non-G Mode PHY Init

Initalization

  1. Write 0x817A to PHY Register 0x3E

  2. OR Radio Register 0x7A with 0x58

  3. If the Radio Revision is 8
    1. Write 0x00 to Radio Register 0x51

    2. Write 0x40 to Radio Register 0x52

    3. Write 0xB7 to Radio Register 0x53

    4. Write 0x98 to Radio Register 0x54

    5. Write 0x88 to Radio Register 0x5A

    6. Write 0x6B to Radio Register 0x5B

    7. Write 0x0F to Radio Register 0x5C

    8. If the Alternate I/Q Settings bit (0x8000) in Board Flags is set

      1. Write 0xFA to Radio Register 0x5D

      2. Write 0xD8 to Radio Register 0x5E

    9. Otherwise
      1. Write 0xF5 to Radio Register 0x5D

      2. Write 0xB8 to Radio Register 0x5E

    10. Write 0x03 to Radio Register 0x73

    11. Write 0xA8 to Radio Register 0x7D

    12. Write 0x01 to Radio Register 0x7C

    13. Write 0x08 to Radio Register 0x7E

  4. Loop 16 times, starting with offset 0x88 and value 0x1E1F
    1. Write value to the PHY Register given by the offset

    2. Increment the offset and subtract 0x202 from the value
  5. Loop 16 times, starting with offset 0x98 and value 0x3E3F
    1. Write value to the PHY Register given by the offset

    2. Increment the offset and subtract 0x202 from the value
  6. Loop 32 times, starting with offset 0xA8 and value 0x2120
    1. Write the value AND'd with 0x3F3F to the PHY Register given by the offset

    2. Increment the offset and add 0x202 to the value
  7. If this is a G PHY
    1. OR Radio Register 0x7A with 0x20

    2. OR Radio Register 0x51 with 0x4

    3. OR PHY Register 0x802 with 0x100

    4. OR PHY Register 0x42B with 0x2000

    5. Write 0x0 to PHY Register 0x5B

    6. Write 0x0 to PHY Register 0x5C

  8. Backup the current channel
  9. If the current channel is 8 or greater
    1. Set the channel to 1
  10. Otherwise
    1. Set the channel to 13
  11. Set the radio channel spec to the channel ORed with 0x2B00
  12. Write 0x20 to Radio Register 0x50

  13. Write 0x23 to Radio Register 0x50

  14. Delay for 40 uSec
  15. If the Radio Revision is 8
    1. OR Radio Register 0x7C with 2

    2. Write 0x20 to Radio Register 0x50

  16. If the Radio Revision is 2 or less
    1. Write 0x20 to Radio Register 0x50

    2. Write 0x70 to Radio Register 0x5A

    3. Write 0x7B to Radio Register 0x5B

    4. Write 0xB0 to Radio Register 0x5C

  17. OR Radio Register 0x7A with 7

  18. Set the channel back to the backed up channel
  19. Write 0x200 to PHY Register 0x14

  20. Write 0x88C2 to PHY Register 0x2A

  21. Write 0x668 to PHY Register 0x38

  22. SetTXPower to 0xFFFF, 0xFFFF, 0xFFFF
  23. If the Radio Revision is 4 or 5 (Note: later drivers do not have this step.)
    1. MaskSet PHY Register 0x5D with mask 0xFF80 and set with 3

  24. If the Radio Revision is 2 or less
    1. Write 0xD to Radio Register 0x5D

  25. If the Analog Version is 4
    1. Write 9 to the 802.11 Register PHY ADC Bias (0x3E4)

    2. AND PHY Register 0x61 with 0xFFF

  26. Otherwise
    1. MaskSet PHY Register 0x2 with mask 0xFFC0 and set with 4

  27. If this is a G PHY
    1. Write 0 to 802.11 Register PHY0 (0x3E6)


Exported/Archived from the wiki to HTML on 2016-10-27