int PHY Antenna RX Diversity Set (u32 val)

1. If this is a N PHY
   1. Return 0 as antenna diversity is not implemented for N PHY
2. Else if this is an LP PHY

   1. If the PHY revision >= 2

      1. Return 0

   2. If val > 1

      1. Set bit 2 in PHY Register 0x410

      2. If val is 2

         1. Set bit 1 in PHY Register 0x410

      3. Otherwise

         1. Clear bit 1 in PHY Register 0x410

   3. Otherwise

      1. Clear bit 2 in PHY Register 0x410

      2. MaskSet PHY Register 0x410 with mask 0xFFFE and set with val

3. Else if this is an A or G PHY
   1. If an A PHY
      1. Set the offset to 0
   2. Otherwise
      1. Set the offset to 0x400

   3. Read PHY Register (offset + 1), mask with 0xFE7F, and save in tmp1

   4. If val > 1

      1. Bitwise OR tmp1 with 0x0180 and save in tmp1
   5. Otherwise
      1. Bitwise OR tmp1 with (val left shifted by 7 and masked with 0x0180) and save in tmp1

   6. Write tmp1 to PHY Register (offset + 1)

   7. If val > 1

      1. Read PHY Register (offset + 0x2B), mask with 0xFEFF, and save as tmp2

      2. If val == 2
         1. Set bit 0x0100 in tmp2

      3. Write tmp2 to PHY Register (offset + 0x2B)

      4. If this is a G PHY

         1. Read PHY Register 0x48C, mask with 0xDFFF and save as tmp1

         2. If val > 1

            1. Set bit 0x2000 in tmp1

         3. Write tmp1 to PHY Register 0x48C

         4. If the PHY revision > 1

            1. Set bit 0x0010 in PHY Register 0x461

            2. MaskSet PHY Register 0x4AD with mask 0xFF00 and set with 0x0015

            3. If the PHY revision is 2

               1. Write 8 to PHY Register 0x427

            4. Otherwise

               1. MaskSet PHY Register 0x427 with mask 0xFF00 and set with 0x0008

         5. If the PHY revision >= 6

            1. Write 0x00DC to PHY Register 0x49B

      5. Otherwise (Note: this is an A PHY)

         1. If PHY revision > 2

            1. Set bit 0x0010 in PHY Register 0x61

            2. If PHY revision = 3

               1. Write 0x001D to PHY Register 0x93

               2. Write 0x0008 to PHY Register 0x27

            3. Otherwise

               1. Write 0x003A to PHY Register 0x93

               2. MaskSet PHY Register 0x27 with mask 0xFF00 and set with 0x0008

         2. Otherwise

         3. MaskSet PHY Register 0x2B with mask 0xFF00 and set with 0x0024

4. Otherwise
   1. Error for unsupported PHY
5. Return 1