Offset

Size

Name

Usage

General

0x00

4

Chip ID

General information about the chipset

0x04

4

Capabilities

A bitfield of chipset capabilities

0x08

4

Core Control

Only present if the Core Revision is >= 1

0x0C

4

bist

Unknown?

OTP Only present if Core Revision >= 10

0x10

4

OTP Status

0x14

4

OTP Control

0x18

4

OTP Prog

Interrupt Control

0x20

4

Interrupt Status

0x24

4

Interrupt Mask

0x28

4

Chip Control

Revision >= 11 Only

0x2C

4

Chip Status

Revision >= 11 Only

JTAG Master Only present if Core Revision >= 10

0x30

4

JTAG Command

0x34

4

JTAG IR

0x38

4

JTAG DR

0x3C

4

JTAG Control

Serial Flash Interface

0x40

4

Flash Control

Serial Flash Interface Control Register

0x44

4

Flash Address

Serial Flash Interface Addressing Register

0x48

4

Flash Data

Serial Flash Interface Data Register

Silicon Backplane Configuration Broadcast Control

0x50

4

Broadcast Address

0x54

4

Broadcast Data

GPIO Registers Cleared only by power on reset

0x60

4

GPIOIN

GPIO Input

0x64

4

GPIOOUT

GPIO Output

0x68

4

GPIOOUTEN

GPIO Output Enable

0x6C

4

GPIO Control

GPIO Control

0x70

4

GPIO Polarity

GPIO Pin Polarity

0x74

4

GPIO Interrupt Mask

GPIO Interrupt Mask

Watchdog Timer

0x80

4

Watchdog Timer

Clock Control Registers

0x90

4

Clock Control N

0x94

4

Clock Control SB

(M0)

0x98

4

Clock Control PCI

(M1)

0x9C

4

Clock Control M2

(M2/uart/mem)

0xA0

4

Clock Control MIPS

(M3)

0xA4

4

UART Clock Divider

Only present if Core Revision is >= 3

PLL Delay Registers Only present if Core Revision is >= 4

0x00B0

4

pll_on_delay

0x00B4

4

fref_sel_delay

0x00B8

4

slow_clk_ctl

Only Present if Core Revision is between 6 and 9 inclusive

Instaclock Registers Only if Core Revision is >= 10

0x00C0

4

System Clock Control

0x00C4

4

Clock State Stretch

External Bus Control Registers Only if Core Revision >= 3

0x0100

4

PCMCIA Config

0x0104

4

PCMCIA Mem Wait

0x0108

4

PCMCIA Attr Wait

0x010C

4

PCMCIA IO Wait

0x0110

4

IDE Config

0x0114

4

IDE Mem Wait

0x0118

4

IDE Attr Wait

0x011C

4

IDE IO Wait

0x0120

4

Prog Config

0x0124

4

Prog Wait Count

0x0128

4

Flash Config

0x012C

4

Flash Wait Count

UART 1

0x0300

4

Data

0x0304

4

IMR

0x0308

4

FCR

0x030C

4

LCR

0x0310

4

MCR

0x0314

4

LSR

0x0318

4

MSR

0x031C

4

Scratch

UART 2

0x0400

4

Data

0x0404

4

IMR

0x0408

4

FCR

0x040C

4

LCR

0x0410

4

MCR

0x0414

4

LSR

0x0418

4

MSR

0x041C

4

Scratch

Common Core Configuration Registers

0x0F00

256

Common Core Registers

Mask

Usage

0x0000FFFF

Chip ID

0x000F0000

Chip Revision

0x00F00000

Package Options

0x0F000000

Number of Cores (ChipCommon Core Revision >= 4)

0xF0000000

Chip Type

Value

Type

0

SSB

1

AI

Mask

Usage

0x00000003

# of UARTs

0x00000004

MIPS in Big Endian Mode

0x00000018

UART Clock Select

0x00000020

UARTs on GPIO 15-12

0x000000C0

External Buses Present

0x00000700

Flash Type

0x00038000

Type of PLL

0x00040000

Power Control

0x00380000

OTP Size

0x00400000

JTAG Master Present

0x00800000

Internal Boot Rom Active

0x08000000

64 Bit Backplane

0x10000000

PMU Available (rev >= 20)

0x20000000

ECI Available (rev >= 20)