Writing to Template/FIFO Ram
The Template Ram is 32KB in size and is accessed by writing the offset to the Transmit Template Control Register, 0x0130, then writing the data to the Transmit Template Data Register, 0x0134. Note that if the Big Endian bit is set in the MAC Control Register you must ensure that the data is written in big endian format (or little endian if the bit is not set).
Template/FIFO Ram Layout
Range |
Usage |
0x0000 - 0x05FF |
template for ACK (0x0000), beacons and probe response (0x0068, 0x0268, 0x0468) |
0x0600 - 0x0EFF |
TX FIFO number 0, size is 0x0900 |
0x0F00 - 0x1BFF |
TX FIFO number 1, size is 0x0D00 |
0x1C00 - 0x25FF |
TX FIFO number 2, size is 0x0A00 |
0x2600 - 0x2DFF |
TX FIFO number 3, size is 0x0800 |
0x2E00 - 0x3AFF |
TX FIFO number 4, size is 0x0D00 |
0x3B00 - 0x3BFF |
TX FIFO number 5, size is 0x0100 |
0x3C00 - 0x43FF |
unknown but modifiable |
0x4400 - 0x7FFF |
unknown but fixed, not modifiable |