SSB PMU Recalibrate
- If the chip ID is not 0x4325
- Return
- Save the current core index
- Switch to the chipcommon core
- Write 1 to SSB_CHIPCO_CHIPCTL_ADDR
- Clear bit 0x04 in SSB_CHIPCO_CHIPCTL_DATA
- Read SSB_CHIPCO_CHIPSTAT and mask with 0x08 and right shift by 3
- If the result is not zero
- Set tmp to 6
- Otherwise
- Set tmp to 0
- Set bit 0x04 in SSB_CHIPCO_CHIPCTL_DATA
- Spin wait for SSB_CHIPCO_CHIPSTAT ANDed with 0x08 to be zero. Test every 10 usec and loop for a maximum of 1 million times (?? - very long)
- Error if the loop times out
- If tmp is zero
- Set tmp to SSB_CHIPCO_CHIPSTAT right shifted by 5 and ANDed with 0x0F
- Write 0 to SSB_CHIPCO_REGCTL_ADDR
MaskSet SSB_CHIPCO_REGCTL_DATA using mask ~(0x07 << 29) and set with (tmp & 0x07) << 29
- Write 1 to SSB_CHIPCO_REGCTL_ADDR
MaskSet SSB_CHIPCO_REGCTL_DATA using mask ~0x01 and set with (tmp >> 3) ANDed with 0x01
- Write 0 to SSB_CHIPCO_CHIPCTL_ADDR
MaskSet SSB_CHIPCO_CHIPCTL_DATA with mask ~(0x03 << 30) and set with (tmp & 0x03) << 30
- Write 1 to SSB_CHIPCO_CHIPCTL_ADDR
MaskSet SSB_CHIPCO_CHIPCTL_DATA with mask ~0x03 and set with (tmp >> 2) & 0x03
- Write 0 to SSB_CHIPCO_CHIPCTL_ADDR
Set bit 0x01 << 29 in SSB_CHIPCO_CHIPCTL_DATA
- Write 1 to SSB_CHIPCO_CHIPCTL_ADDR
- Clear bit 0x04 in SSB_CHIPCO_CHIPCTL_DATA
- Restore original core