general

Power saving is described in 11.2 of 802.11.

device

Power Saving is controlled through two bits in the MAC Control Register, bit 0x04000000 (Device is Awake) and bit 0x02000000 (Hardware Power Saving).

When it's safe for the device to enter PS mode, the Hardware Power Saving bit may be enabled. It's safe for the device to ender PS mode when: ... (FIXME)

When the hardware cannot enter PS mode, you cannot set the "Device is Awake" bit. You should also take the following into consideration when setting the "Device is Awake" bit: ... (FIXME)

NOTE: When the device is connected via PCI and the PCI core is revision <= 10, then the device must stay awake while frames are transmitted and you haven't gotten a tx status yet! (probably IRQ routing problems? or why does it depend on the PCI core revision? could we poll irq register instead?)

device support for power saving in IBSS mode

Power saving in IBSS mode is done by way of an ATIM window during which all stations must be awake; during that window ATIM frames (announcements that data is available) are sent and the recipient STA should then stay awake for the beacon interval to receive and announced frames. The chip supports this by way of raising an interrupt when the ATIM window ends and apparently having some queue functionality.