PMU Resource Init

struct pmu_res_updown { u8 resnum; u16 updown; };

struct pmu_res_depend { u32 res_mask; s8 action; u32 depend_mask; bool (*filter_routine)();};

1. Initialize a struct pmu_res_updown pointer to NULL
2. Initialize a struct pmu_res_depend pointer to NULL
3. Initialize a u16 updown_size to 0
4. Initialize a u16 depend_size to 0
5. Initialize u32 variables min_mask and max_mask to 0
6. If bit 0x10000000 is not set in chipcommon capabilities
   1. Return
7. Save current core index and switch to chipcommon
8. If Chip ID is 0x4328
   1. Set pmu_res_updown pointer to bcm4328a0_res_updown table (below)
   2. Set pmu_res_depend pointer to bcm4328a0_res_depend table
   3. Set updown_size to size of bcm4328a0_res_updown table
   4. Set depend_size to size of bcm4328a0_res_depend table
9. Else if Chip ID is 0x4325
   1. Set pmu_res_updown pointer to bcm4325a0_res_updown table (below)
   2. Set pmu_res_depend pointer to bcm4325a0_res_depend table
   3. Set updown_size to size of bcm4325a0_res_updown table
   4. Set depend_size to size of bcm4325a0_res_depend table

10. Set rscrs to (PMU capabilities & 0x1F00) right shifted by 8

11. While updown_size is > 0

    1. Decrement updown_size
    2. Write pmu_res_updown[updown_size].resnum to MMIO register 0x620
    3. Write pmu_res_updown[updown_size].updown to MMIO register 0x628
12. Loop rscrs times with loop index i
    1. If nvram has no variable rNt, where N is the value of i - TODO: How are these determined?
       1. Continue
    2. Write i to MMIO register 0x620
    3. Get the value of the nvram variable and write to MMIO register 0x628

13. While depend_size is > 0

    1. Decrement depend_size
    2. If pmu_res_depend[depend_size].filter is not NULL and pmu_res_depend[depend_size].filter() is zero
       1. Continue
    3. Loop rscrs times with loop index i

       1. If pmu_res_depend[depend_size].res_mask & (1 << i) is zero

          1. Continue
       2. Write i to MMIO register 0x620
       3. If pmu_res_depend[depend_size].action is 0
          1. Write pmu_res_depend[depend_size].depend_mask to MMIO register 0x624
       4. Else if pmu_res_depend[depend_size].action is 1
          1. Set pmu_res_depend[depend_size].depend_mask in MMIO register 0x624
       5. Else if pmu_res_depend[depend_size].action is -1
          1. Clear pmu_res_depend[depend_size].depend_mask in MMIO register 0x624
       6. Otherwise
          1. Warn on invalid value
14. Loop rscrs times with loop index i
    1. If nvram has no variable rNd, where N is the value of i - TODO: How are these determined?
       1. Continue
    2. Write i to MMIO register 0x620
    3. Get the value of the nvram variable and write to MMIO register 0x628

15. Call PMU Resource Masks with &min_mask, &max_mask as arguments

16. If min_mask is not zero
    1. Write min_mask to MMIO register 0x618
17. If max_mask is not zero
    1. Write max_mask to MMIO register 0x61C
18. Restore original core

struct pmu_res_updown bcm4328a0_res_updown

• Resnum	updown
  0	0x0101
  1	0x1f01
  2	0x010f
  3	0x0101
  4	0x0202
  5	0x0f01
  6	0x0f01
  7	0x0101
  8	0x0f01
  9	0x0f01
  10	0x0f01
  11	0x0f01
  12	0x0101
  13	0x0101
  14	0x0101
  15	0x0101
  16	0xa001
  17	0x0101
  18	0x0101
  19	0x0701

struct pmu_res_updown bcm4325a0_res_updown

• Resnum	updown
  13	0x1501

struct pmu_res_updown bcm4328a0_res_depend

• Res_mask	action	depend_mask	filter_routine
  0x00000010	0	0x00000003	NULL

struct pmu_res_updown bcm4325a0_res_depend

• Res_mask	action	depend_mask	filter_routine
  0x00000400	-1	0x00000001	PMU Res Depfilter NBB
  0x00204000	1	0x00000021	PMU Res Depfilter BB
  0x00200000	1	0x000D8000	NULL
  0x003CF3C0	-1	0x0000000E	PMU Res Depfilter NCB