bcm-v4

[Specification

SSLPN PHY Code

  1. Call SSLPN PHY Set Chanspec Default Tweaks

  2. Call SSLPN PHY Set Chanspec Default Tweaks with argument 1

  3. Call SSLPN PHY Baseband Init

  4. Call SSLPN PHY Radio Init

  5. Call SSLPN PHY RC Cal

  6. Write 0x3F to Radio Register 0x55
  7. Call SSLPN PHY Set Chanspec with radio_chanspec as argument

  8. Call SSLPN PHY Set Chanspec Default Tweaks with radio_chanspec as argument

  9. If PHY Revision is 1
    1. Call SSLPN PHY Cm RX ACI Gain Table Tweaks

  10. Call SSLPN PHY AGC Temp Init

  11. Loop 101 times from 0 with index i
    1. Set sslpnphy_saved_tx_user_target[i] to txpwr_limit[i]

  12. Call SSLPN PHY Full Calibration

  13. Call SSLPN PHY Temperature Sense

  14. Call SSLPN PHY Temperature Adjust

  15. Call SSLPN PHY TX Power Control Init

  16. If PHY Revision is 1
    1. Write 0x00C1 to PHY Register 0x570
    2. Write 0x00FF to PHY Register 0x571
    3. Write 0xFF1B to PHY Register 0x572
    4. Write 0xFF39 to PHY Register 0x573
    5. Write 0x00EC to PHY Register 0x574
    6. Write 0x0034 to PHY Register 0x575
    7. Write 0x001F to PHY Register 0x576
    8. Write 0xFFF7 to PHY Register 0x577
    9. Write 0xFFF1 to PHY Register 0x578
    10. Write 0x0100 to PHY Register 0x579
    11. Write 0x0078 to PHY Register 0x5E0
    12. Write 0xFFC1 to PHY Register 0x5E1
    13. Write 0x0100 to PHY Register 0x5E2
    14. Write 0xFFC1 to PHY Register 0x5E3
    15. Write 0x0078 to PHY Register 0x5E4
    16. Write 0xFF7A to PHY Register 0x5E5
    17. Write 0xFFEE to PHY Register 0x5E6
    18. Write 0x0000 to PHY Register 0x5E7
    19. Write 0x0012 to PHY Register 0x5E8
    20. Write 0x0086 to PHY Register 0x5E9
    21. Write 0x0041 to PHY Register 0x5EA
    22. Write 0xFFEC to PHY Register 0x5EB
    23. Write 0xFF5E to PHY Register 0x5EC
    24. Write 0x007F to PHY Register 0x5ED
    25. Write 0x00C8 to PHY Register 0x5EE
    26. Write 0x0000 to PHY Register 0x5EF
    27. Write 0x0000 to PHY Register 0x5F0
    28. Write 0x0000 to PHY Register 0x5F1
    29. Write 0x0000 to PHY Register 0x5F2
    30. Write 0x0000 to PHY Register 0x5F3
  17. Else if PHY Revision >= 2

    1. Write 0x0034 to PHY Register 0x857
    2. Write 0x001F to PHY Register 0x858
    3. Write 0xFFF7 to PHY Register 0x859
    4. Write 0xFFF1 to PHY Register 0x85A
    5. Write 0x0100 to PHY Register 0x85B
  18. Write 0x009D to PHY Register 0x852
  19. Write 0x00ED to PHY Register 0x853
  20. Write 0xFF19 to PHY Register 0x854
  21. Write 0xFF48 to PHY Register 0x855
  22. Write 0x00FF to PHY Register 0x856
  23. Write 0x0041 to PHY Register 0x5EA
  24. Write 0x0000 to PHY Register 0x5EF
  25. Write 0xFFEC to PHY Register 0x5EB
  26. Write 0x0000 to PHY Register 0x5F0
  27. Write 0xFF5E to PHY Register 0x5EC
  28. Write 0x0000 to PHY Register 0x5F1
  29. Write 0x007F to PHY Register 0x5ED
  30. Write 0x0000 to PHY Register 0x5F2
  31. Write 0x00C8 to PHY Register 0x5EE
  32. Write 0x0000 to PHY Register 0x5F3
  33. Write 0x0042 to PHY Register 0x5E0
  34. Write 0x0010 to PHY Register 0x5E1
  35. Write 0x0100 to PHY Register 0x5E2
  36. Write 0x0010 to PHY Register 0x5E3
  37. Write 0x0042 to PHY Register 0x5E4
  38. Write 0xFF55 to PHY Register 0x5E5
  39. Write 0xFFB9 to PHY Register 0x5E6
  40. Write 0x0000 to PHY Register 0x5E7
  41. Write 0x0047 to PHY Register 0x5E8
  42. Write 0x00AB to PHY Register 0x5E9
  43. Write 0x0100 to PHY Register 0x85C
  44. Write 0x0000 to PHY Register 0x85D
  45. Write 0x0000 to PHY Register 0x85E
  46. Write 0x0000 to PHY Register 0x85F
  47. Write 0x0000 to PHY Register 0x860
  48. Write 0x002F to PHY Register 0x861
  49. Write 0x0011 to PHY Register 0x862
  50. Write 0xFFE5 to PHY Register 0x863
  51. Write 0xFFEC to PHY Register 0x864
  52. Write 0x0100 to PHY Register 0x865
  53. Write 0x0000 to PHY Register 0x866
  54. Write 0x0000 to PHY Register 0x867
  55. Write 0x0000 to PHY Register 0x868
  56. Write 0x0000 to PHY Register 0x869
  57. Write 0x0000 to PHY Register 0x86A
  58. Set bit 0x0080 in PHY Register 0x631
  59. Set bits 0x0022 in PHY Register 0x6DA
  60. Set bit 0x0040 in PHY Register 0x631
  61. If the chip ID is 0x5356
    1. Write 0x063F to PHY Register 0x62C
    2. Write 0x075F to PHY Register 0x62D
    3. Write 0x7FFF to PHY Register 0x62E
    4. Write 0x7FFF to PHY Register 0x62F
  62. Set sslpnphy_noise_samples to 5000

  63. Read Radio Register 0xA5 and save in sslpnphy_logen_buf_1

  64. Read Radio Register 0x8E and save in sslpnphy_local_ovr_2

  65. Read Radio Register 0x94 and save in sslpnphy_local_oval_6

  66. Read Radio Register 0x93 and save in sslpnphy_local_oval_5

  67. Read Radio Register 0xA3 and save in sslpnphy_logen_mixer_1

  68. Call SSLPN PHY Set TX Power by Index with argument 50


Exported/Archived from the wiki to HTML on 2016-10-27