PHY reset(pih)

1. Set in_reset to FALSE (local bool)
2. Set a u32 clock bits variable to 0
3. If this is an N PHY
   1. If the band width is 10 MHz
      1. Set clock bits to 0
   2. Else if the band width is 20 MHz

      1. Set clock bits to 1 << 22

   3. Else if the band width is 40 MHz

      1. Set clock bits to 2 << 22

   4. Otherwise
      1. Error condition
   5. If PHY Revision is 3 or 4
      1. Set core register 0x00C00000 to the clock bits
      2. Delay 1 usec

      3. Call PHY PLL Reset

      4. Set bits 0xC0000 in core flags
      5. Set in_reset to TRUE
4. If in_reset is FALSE
   1. Mask set SB Target State Low with mask 0xFF33FFFF and set with 0x00C00000 ORed with clock bits
5. Delay 2 usec
6. Mask set SB Target State Low with mask 0xFFF5FFFF and set with 0x00200000
7. Delay 1 usec
8. Bitwise AND SB Target State Low with mask 0xFFFDFFFF
9. Delay 1 usec
10. If argument is not zero (This should/must be true.)

    1. Call PHY Analog Core with argument 1