PHY Radio 2055 Setup (struct chan_info_nphy *inp)
- Write the inp entries for Radio Registers 0x35, 0x3B, 0x3C and 0x51 to the respective Radio Registers
- If the bus is PCI and PHY Revision less than 3
- Do a read of the MAC Control register
- Write the inp entries for Radio Registers 0x40, 0x41, 0x32 and 0x36 to the respective Radio Registers
- If the bus is PCI and PHY Revision less than 3
- Do a read of the MAC Control register
- Write the inp entries for Radio Registers 0x34, 0x55, 0x56 and 0x57 to the respective Radio Registers
- If the bus is PCI and PHY Revision less than 3
- Do a read of the MAC Control register
- Write the inp entries for Radio Registers 0x5F, 0x60, 0x67 and 0x7F to the respective Radio Registers
- If the bus is PCI and PHY Revision less than 3
- Do a read of the MAC Control register
- Write the inp entries for Radio Registers 0x82, 0x8E, 0x8F and 0x96 to the respective Radio Registers
- If the bus is PCI and PHY Revision less than 3
- Do a read of the MAC Control register
- Write the inp entries for Radio Registers 0xAE, and 0xB1 to the respective Radio Registers
- Delay 50 usec
- Write 0x05 to Radio Register 0x49
- Write 0x45 to Radio Register 0x49
- If the bus is PCI and PHY Revision less than 3
- Do a read of the MAC Control register
- Write 0x65 to Radio Register 0x49
- Delay 300 usec