bcm-v4

[Specification

N PHY RSSI Select (u8 code, u8 type)

  1. If PHY Revision >= 3

    1. If code is 0
      1. MaskSet PHY Register 0x8F with mask 0xFDFF and set with 0

      2. MaskSet PHY Register 0xA5 with mask 0xFDFF and set with 0

      3. MaskSet PHY Register 0xA6 with mask 0xFCFF and set with 0

      4. MaskSet PHY Register 0xA7 with mask 0xFCFF and set with 0

      5. MaskSet PHY Register 0xE5 with mask 0xFFDF and set with 0

      6. MaskSet PHY Register 0xE6 with mask 0xFFDF and set with 0

      7. MaskSet PHY Register 0xF9 with mask 0xFFC3 and set with 0

      8. MaskSet PHY Register 0xFB with mask 0xFFC3 and set with 0

    2. Otherwise
      1. Loop 2 times with index i
        1. If code is 1 and i is 1
          1. Continue
        2. Else if code is 2 and i is 0
          1. Continue
        3. If i is 0
          1. MaskSet PHY Register 0x8F with mask 0xFDFF and set with 0x0200

        4. Otherwise
          1. MaskSet PHY Register 0xA5 with mask 0xFDFF and set with 0x0200

        5. If type is 0, 1, or 2
          1. If i is 0
            1. MaskSet PHY Register 0xA6 with mask 0xFCFF and set with 0x0000

            2. MaskSet PHY Register 0xF9 with mask 0xFFC3 and set with 0x0000

          2. Otherwise
            1. MaskSet PHY Register 0xA7 with mask 0xFCFF and set with 0x0000

            2. MaskSet PHY Register 0xFB with mask 0xFFC3 and set with 0x0000

          3. If type is 0
            1. If band is 5G
              1. Set val to 4
            2. Otherwise
              1. Set val to 8
          4. Else if type is 1
            1. Set val to 16
          5. Otherwise
            1. Set val to 32
          6. If i is 0
            1. Set the bits in val in PHY Register 0xF9
            2. Set bit 0x0020 in PHY Register 0xE5
          7. Otherwise
            1. Set the bits in val in PHY Register 0xFB
            2. Set bit 0x0020 in PHY Register 0xE6
        6. Otherwise (type > 2)

          1. If type is 6
            1. If i is 0
              1. MaskSet PHY Register 0xA6 with mask 0xFCFF and set with 0x0100

              2. MaskSet PHY Register 0xA6 with mask 0xF3FF and set with 0x0400

            2. Otherwise
              1. MaskSet PHY Register 0xA7 with mask 0xFCFF and set with 0x0100

              2. MaskSet PHY Register 0xA7 with mask 0xF3FF and set with 0x0400

          2. Else if type is 3
            1. If i is 0
              1. MaskSet PHY Register 0xA6 with mask 0xFCFF and set with 0x0200

              2. MaskSet PHY Register 0xA6 with mask 0xF3FF and set with 0x0800

            2. Otherwise
              1. MaskSet PHY Register 0xA7 with mask 0xFCFF and set with 0x0200

              2. MaskSet PHY Register 0xA7 with mask 0xF3FF and set with 0x0800

          3. Otherwise
            1. if i is 0
              1. MaskSet PHY Register 0xA6 with mask 0xFCFF and set with 0x0300

              2. MaskSet PHY Register 0xA6 with mask 0xF3FF and set with 0x0C00

            2. Otherwise
              1. MaskSet PHY Register 0xA7 with mask 0xFCFF and set with 0x0300

              2. MaskSet PHY Register 0xA7 with mask 0xF3FF and set with 0x0C00

            3. If (nphy_ipa2g_on and band is 2 GHz) or (nphy_ipa5g_on and band is 5 GHz)

              1. If band is 5 GHz
                1. Set tmp to 0xC
              2. Otherwise
                1. Set tmp to 0xE
              3. If i is 0
                1. Write tmp to Radio Register 0x202D
                2. Write 0x11 to Radio Register 0x202D
              4. Otherwise
                1. Write tmp to Radio Register 0x302D
                2. Write 0x11 to Radio Register 0x302D
            4. If i is 0
              1. Set bit 0x0200 in PHY Register 0x8F
            5. Otherwise
              1. Set bit 0x0200 in PHY Register 0xA5
  2. Otherwise (PHY Rev < 3)

    1. If type is 0, 1, or 2
      1. Set val to 0
    2. Else if type is 6
      1. Set val to 1
    3. Else if type is 3
      1. Set val to 2
    4. Otherwise
      1. Set val to 3
    5. MaskSet PHY Register 0xA6 with mask 0x0FFF and set with val << 12 | val << 14

    6. MaskSet PHY Register 0xA7 with mask 0x0FFF and set with val << 12 | val << 14

    7. If type is 0, 1, or 2
      1. MaskSet PHY Register 0x7A with mask 0xFFCF and set with (type + 1) << 4

      2. MaskSet PHY Register 0x7D with mask 0xFFCF and set with (type + 1) << 4

    8. If code is 0
      1. MaskSet PHY Register 0xA5 with mask 0xCFFF and set with 0

      2. If type is 0, 1, or 2
        1. MaskSet PHY Register 0x78 with mask 0xFEC7 and set with 0

        2. MaskSet PHY Register 0xEC with mask 0xEFDC and set with 0

        3. MaskSet PHY Register 0x78 with mask 0xFFFE and set with 0

        4. Delay 20 usec
        5. MaskSet PHY Register 0xEC with mask 0xFFFE and set with 0

    9. Otherwise
      1. MaskSet PHY Register 0xA5 with mask 0xCFFF and set with 0x3000

      2. If type is 0, 1, or 2
        1. MaskSet PHY Register 0x78 with mask 0xFEC7 and set with 0x0100 | code << 3

        2. MaskSet PHY Register 0xEC with mask 0xEFDC and set with 0x1023

        3. MaskSet PHY Register 0x78 with mask 0xFFFE and set with 0x0001

        4. Delay 20 usec
        5. MaskSet PHY Register 0xEC with mask 0xFFFE and set with 0


Exported/Archived from the wiki to HTML on 2016-10-27