802.11/PHY/N/Init

Contents

variables/settings
N PHY code
TX Power Control - TX Gain tables

variables/settings

the desired MIMO config is "automatic" or, for PHY revs 3 and 4, mixed mode.
PHY hang avoidance is required for PHY revs 3 and 4
G band SPUR workaround is required for PHY revs 3 and 4
by default, TX power control is off (0) and 5 GHz power gain is off
TX power control is hardware (1) and 5 GHz power gain is on for PHY revs >= 3, for Apple boards with core revision 11 or 12
otherwise, for PHY rev >= 2 and SPROM revision >= 4, if the TX power control enable boardflag is set
- if the device ID (PCI ID) is 0x4328 or 0x432a, and the 5ghz power gain boardflag is set, 5 GHz power gain is on and TX power control is hardware
- for all other device IDs (PCI IDs) TX power control is hardware
otherwise 5 GHz power gain is on if the SPROM is revision >= 4 and the 5 GHz power gain boardflag is set

N PHY code

Establish a 2-element u16 array clip
Initialize do_cal to 0
If PHY revision >= 3, bit 0x00001000 is set in the board flags, and this is a 2 GHz band
1. Set bit 0x40 in the Chip Control register (0x28)
Set nphy_deaf_count to 0
Initialize the NPHY Tables
Set nphy_crsminpwr_adjusted and nphy_noisevars_adjusted to FALSE
If PHY Revision >= 3
1. Write zero to PHY registers 0xe7, 0xec, 0xe5 and 0xe6
Otherwise
1. Write 0 to PHY register 0xec.
Write 0 to PHY Registers 0x91 and 0x92
If PHY Revision < 6
1. Write 0 to PHY Registers 0x93 and 0x94
AND PHY Register 0xA1 with 0xFFFC
If PHY Revision >= 3
1. Write 0 to PHY Register 0x8F and 0xA5
Otherwise
1. Write 0 to PHY Register 0xA5
If PHY Revision is 2
1. MaskSet PHY Register 0xDC with mask 0xFF00 and set with 0x3B
Else if PHY Revision < 2
1. MaskSet PHY Register 0xDC with mask 0xFF00 and set with 0x40
Write 0x20 to PHY Register 0x203 and 0x201
If 0x100 is set in boardflags2 OR this is an Apple board with boardtype 0x8b
1. write 0xA0 to PHY Register 0x20d
Otherwise
1. Write 0xB8 to PHY Register 0x20d
Write 0xC8 to PHY Register 0x13A
Write 0x50 to PHY Register 0x70
Write 0x30 to PHY Register 0x1ff
Update MIMO Config with nphy_preamble_override as argument
Call Update TX/RX chain
If the PHY Revision is less than 2
1. Write 0xAA8 to PHY Register 0x180
2. Write 0x9A4 to PHY Register 0x181
If (nphy_ipa2g_on and the band type is 2G) or (nphy_ipa5g_on and the band type is 5G)
1. Set bit 0x1 in PHY Register 0x297
2. Maskset PHY Register 0x298 with mask 0x007F and set with nphy_papd_epsilon_offset[0] << 7
3. Set bit 0x1 in PHY Register 0x29B
4. Maskset PHY Register 0x29C with mask 0x007F and set with nphy_papd_epsilon_offset[1] << 7
5. Call N PHY IPA Set TX Dig Filters
Otherwise
1. If PHY Revision >= 5
  1. Call N PHY Ext PA Set TX Dig Filters
Call NPHY Workarounds
Call N PHY BMAC Clock FGC with argument 1
Read PHY Register 0x01 and save in val
Write val | 0x4000 to PHY Register 0x1
Write val & 0xBFFF to PHY Register 0x1
Call N PHY BMAC Clock FGC with argument 0
Call N PHY MAC PHY Clock Set with argument 1
Disable PA Override
Force RF Sequence reset rx to tx (argument is 0)
Force RF Sequence reset to rx (argument is 2)
Turn on PA override
Call N PHY Classifier with arguments 0 and 0
Call N PHY Det Clip with 0 and the clip array as arguments
If the band is 2.4 GHz
1. Call B PHY Init
Set tx_pwr_state to nphy_txpwrctrl
Call N PHY TX power Control Enable with argument 0 (turning off power control)
Call N PHY TX Power Fix
Call N PHY TX Power Control Idle TSSI
Call N PHY TX Power Control Setup
If the PHY Revision >= 3
1. If (nphy_ipa2g_on and the band type is 2G) or (nphy_ipa5g_on and the band type is 5G)
  1. Set the TX Power Control Table pointer to the output of N PHY Get IPA Gain Table
2. Otherwise
  1. If this is a 5G band
    1. If the Phy Revision is 3
      1. Set the TX Power Control Table to the Rev 3, 5 GHz table below
    2. Else if the PHY Revision is 4
      1. Set the TX Power Control Table to the Rev 4, 5 GHz table below
    3. Otherwise
      1. Set the TX Power Control Table to the Rev 5, 5 GHz table below
  2. Otherwise
    1. Set the TX Power Control Table to the Rev 3, 2.4 GHz table below
3. Write the appropriate TX Power Control Table to the 32-bit table 26 and 27 at offset 192
4. Set nphy_gmval to the first entry of the selected power gain table >> 16 & 0x7000
5. Loop 128 times with index i
  1. Set pga_gain to the ith element of the TX Power Control Table right shifted by 24 and masked with 0xF
  2. If this is a 2 GHz band
    1. Set rfpwr_offset to nphy_papd_pga_gain_delta_ipa_2g indexed by pga_gain
  3. Otherwise
    1. Set rfpwr_offset to nphy_papd_pga_gain_delta_ipa_5g indexed by pga_gain
  4. Write an N PHY table with ID 26, length 1, offset 576 + i, width 32 and the data pointer at rfpwr_offset.
  5. Write an N PHY table with ID 27, length 1, offset 576 + i, width 32 and the data pointer at rfpwr_offset.
Otherwise
1. Write an N PHY table with ID 26, length 128, offset 192, width 32, and the data from Rev 2 TX Power Control Table
2. Write an N PHY table with ID 27, length 128, offset 192, width 32, and the data from Rev 2 TX Power Control Table
If phyrxchain is not 3
1. Call N PHY RX Core Set State with phyrxchain as argument
If mphase_cal_phase_id greater then 0
1. Call PHY Periodic Calibration Multi-Phase Restart
Set do_rssi_cal to false
If the PHY revision >= 3
1. If the band type is 2 GHz
  1. Set do_rssi_cal to nphy_rssical_chanspec_2G == 0
2. Otherwise
  1. Set do_rssi_cal to nphy_rssical_chanspec_5G == 0
3. If do_rssi_cal
  1. Call N PHY RSSI Calibrate
4. Otherwise
  1. Call N PHY Restore RSSI Cal
Otherwise
1. Call N PHY RSSI Calibrate
If !((measure_hold & 0x6) != 0)
1. If the band is 2 GHz
  1. Set do_cal to (nphy_iqcal_chanspec_2G == 0)
2. Otherwise
  1. Set do_cal to (nphy_iqcal_chanspec_5G == 0)
3. If mute
  1. Set do_cal to false
4. If do_cal
  1. Set target to the output of N PHY Get TX Gain
  2. If antsel_type is 2
    1. Call N PHY Superswitch Init with argument 1
  3. If nphy_perical != 2
    1. Call N PHY RSSI Calibrate
    2. If the PHY Revision >= 3
      1. Set nphy_cal_orig_pwr_idx[0] to nphy_txpwrindex[0].index_internal
      2. Set nphy_cal_orig_pwr_idx[1] to nphy_txpwrindex[1].index_internal
      3. Call N PHY Pre Calibrate TX Gain
      4. Set target to the output of N PHY Get TX Gain
    3. If the output of N PHY Cal TX Iqlo with target, 1, 0 as arguments is 0
      1. If the output of N PHY Cal RX Iq with target, 2, 0 as arguments is 0
        Call N PHY Save Cal
  4. Otherwise if mphase_cal_phase_id is zero
    1. Call N PHY Periodic Calibration with argument 3
5. Otherwise
  1. Call N PHY Restore Calibration
Call N PHY TX Power Control Coef Setup
Call N PHY TX Power Control Enable with argument tx_pwr_state
Write 0x0015 to PHY Register 0x77
Write 0x0320 to PHY Register 0xB4
If PHY Revision is 3, 4, 5, or 6
1. Write 0x0014 to PHY Register 0x70
Call N PHY TX LP FBW
Call N PHY Spur Workaround

TX Power Control - TX Gain tables

rev <= 2

0x03cc2b44

0x03cc2b42

0x03cc2a44

0x03cc2a42

0x03cc2944

0x03c82b44

0x03c82b42

0x03c82a44

0x03c82a42

0x03c82944

0x03c82942

0x03c82844

0x03c82842

0x03c42b44

0x03c42b42

0x03c42a44

0x03c42a42

0x03c42944

0x03c42942

0x03c42844

0x03c42842

0x03c42744

0x03c42742

0x03c42644

0x03c42642

0x03c42544

0x03c42542

0x03c42444

0x03c42442

0x03c02b44

0x03c02b42

0x03c02a44

0x03c02a42

0x03c02944

0x03c02942

0x03c02844

0x03c02842

0x03c02744

0x03c02742

0x03b02b44

0x03b02b42

0x03b02a44

0x03b02a42

0x03b02944

0x03b02942

0x03b02844

0x03b02842

0x03b02744

0x03b02742

0x03b02644

0x03b02642

0x03b02544

0x03b02542

0x03a02b44

0x03a02b42

0x03a02a44

0x03a02a42

0x03a02944

0x03a02942

0x03a02844

0x03a02842

0x03a02744

0x03a02742

0x03902b44

0x03902b42

0x03902a44

0x03902a42

0x03902944

0x03902942

0x03902844

0x03902842

0x03902744

0x03902742

0x03902644

0x03902642

0x03902544

0x03902542

0x03802b44

0x03802b42

0x03802a44

0x03802a42

0x03802944

0x03802942

0x03802844

0x03802842

0x03802744

0x03802742

0x03802644

0x03802642

0x03802544

0x03802542

0x03802444

0x03802442

0x03802344

0x03802342

0x03802244

0x03802242

0x03802144

0x03802142

0x03802044

0x03802042

0x03801f44

0x03801f42

0x03801e44

0x03801e42

0x03801d44

0x03801d42

0x03801c44

0x03801c42

0x03801b44

0x03801b42

0x03801a44

0x03801a42

0x03801944

0x03801942

0x03801844

0x03801842

0x03801744

0x03801742

0x03801644

0x03801642

0x03801544

0x03801542

0x03801444

0x03801442

0x03801344

0x03801342

0x00002b00

rev >= 3 (2.4 GHz)

0x1f410044

0x1f410042

0x1f410040

0x1f41003e

0x1f41003c

0x1f41003b

0x1f410039

0x1f410037

0x1e410044

0x1e410042

0x1e410040

0x1e41003e

0x1e41003c

0x1e41003b

0x1e410039

0x1e410037

0x1d410044

0x1d410042

0x1d410040

0x1d41003e

0x1d41003c

0x1d41003b

0x1d410039

0x1d410037

0x1c410044

0x1c410042

0x1c410040

0x1c41003e

0x1c41003c

0x1c41003b

0x1c410039

0x1c410037

0x1b410044

0x1b410042

0x1b410040

0x1b41003e

0x1b41003c

0x1b41003b

0x1b410039

0x1b410037

0x1a410044

0x1a410042

0x1a410040

0x1a41003e

0x1a41003c

0x1a41003b

0x1a410039

0x1a410037

0x19410044

0x19410042

0x19410040

0x1941003e

0x1941003c

0x1941003b

0x19410039

0x19410037

0x18410044

0x18410042

0x18410040

0x1841003e

0x1841003c

0x1841003b

0x18410039

0x18410037

0x17410044

0x17410042

0x17410040

0x1741003e

0x1741003c

0x1741003b

0x17410039

0x17410037

0x16410044

0x16410042

0x16410040

0x1641003e

0x1641003c

0x1641003b

0x16410039

0x16410037

0x15410044

0x15410042

0x15410040

0x1541003e

0x1541003c

0x1541003b

0x15410039

0x15410037

0x14410044

0x14410042

0x14410040

0x1441003e

0x1441003c

0x1441003b

0x14410039

0x14410037

0x13410044

0x13410042

0x13410040

0x1341003e

0x1341003c

0x1341003b

0x13410039

0x13410037

0x12410044

0x12410042

0x12410040

0x1241003e

0x1241003c

0x1241003b

0x12410039

0x12410037

0x11410044

0x11410042

0x11410040

0x1141003e

0x1141003c

0x1141003b

0x11410039

0x11410037

0x10410044

0x10410042

0x10410040

0x1041003e

0x1041003c

0x1041003b

0x10410039

0x10410037

rev 3 (5 GHz)

0xcff70044

0xcff70042

0xcff70040

0xcff7003e

0xcff7003c

0xcff7003b

0xcff70039

0xcff70037

0xcef70044

0xcef70042

0xcef70040

0xcef7003e

0xcef7003c

0xcef7003b

0xcef70039

0xcef70037

0xcdf70044

0xcdf70042

0xcdf70040

0xcdf7003e

0xcdf7003c

0xcdf7003b

0xcdf70039

0xcdf70037

0xccf70044

0xccf70042

0xccf70040

0xccf7003e

0xccf7003c

0xccf7003b

0xccf70039

0xccf70037

0xcbf70044

0xcbf70042

0xcbf70040

0xcbf7003e

0xcbf7003c

0xcbf7003b

0xcbf70039

0xcbf70037

0xcaf70044

0xcaf70042

0xcaf70040

0xcaf7003e

0xcaf7003c

0xcaf7003b

0xcaf70039

0xcaf70037

0xc9f70044

0xc9f70042

0xc9f70040

0xc9f7003e

0xc9f7003c

0xc9f7003b

0xc9f70039

0xc9f70037

0xc8f70044

0xc8f70042

0xc8f70040

0xc8f7003e

0xc8f7003c

0xc8f7003b

0xc8f70039

0xc8f70037

0xc7f70044

0xc7f70042

0xc7f70040

0xc7f7003e

0xc7f7003c

0xc7f7003b

0xc7f70039

0xc7f70037

0xc6f70044

0xc6f70042

0xc6f70040

0xc6f7003e

0xc6f7003c

0xc6f7003b

0xc6f70039

0xc6f70037

0xc5f70044

0xc5f70042

0xc5f70040

0xc5f7003e

0xc5f7003c

0xc5f7003b

0xc5f70039

0xc5f70037

0xc4f70044

0xc4f70042

0xc4f70040

0xc4f7003e

0xc4f7003c

0xc4f7003b

0xc4f70039

0xc4f70037

0xc3f70044

0xc3f70042

0xc3f70040

0xc3f7003e

0xc3f7003c

0xc3f7003b

0xc3f70039

0xc3f70037

0xc2f70044

0xc2f70042

0xc2f70040

0xc2f7003e

0xc2f7003c

0xc2f7003b

0xc2f70039

0xc2f70037

0xc1f70044

0xc1f70042

0xc1f70040

0xc1f7003e

0xc1f7003c

0xc1f7003b

0xc1f70039

0xc1f70037

0xc0f70044

0xc0f70042

0xc0f70040

0xc0f7003e

0xc0f7003c

0xc0f7003b

0xc0f70039

0xc0f70037

rev 4 (5 GHz)

0x2ff20044

0x2ff20042

0x2ff20040

0x2ff2003e

0x2ff2003c

0x2ff2003b

0x2ff20039

0x2ff20037

0x2ef20044

0x2ef20042

0x2ef20040

0x2ef2003e

0x2ef2003c

0x2ef2003b

0x2ef20039

0x2ef20037

0x2df20044

0x2df20042

0x2df20040

0x2df2003e

0x2df2003c

0x2df2003b

0x2df20039

0x2df20037

0x2cf20044

0x2cf20042

0x2cf20040

0x2cf2003e

0x2cf2003c

0x2cf2003b

0x2cf20039

0x2cf20037

0x2bf20044

0x2bf20042

0x2bf20040

0x2bf2003e

0x2bf2003c

0x2bf2003b

0x2bf20039

0x2bf20037

0x2af20044

0x2af20042

0x2af20040

0x2af2003e

0x2af2003c

0x2af2003b

0x2af20039

0x2af20037

0x29f20044

0x29f20042

0x29f20040

0x29f2003e

0x29f2003c

0x29f2003b

0x29f20039

0x29f20037

0x28f20044

0x28f20042

0x28f20040

0x28f2003e

0x28f2003c

0x28f2003b

0x28f20039

0x28f20037

0x27f20044

0x27f20042

0x27f20040

0x27f2003e

0x27f2003c

0x27f2003b

0x27f20039

0x27f20037

0x26f20044

0x26f20042

0x26f20040

0x26f2003e

0x26f2003c

0x26f2003b

0x26f20039

0x26f20037

0x25f20044

0x25f20042

0x25f20040

0x25f2003e

0x25f2003c

0x25f2003b

0x25f20039

0x25f20037

0x24f20044

0x24f20042

0x24f20040

0x24f2003e

0x24f2003c

0x24f2003b

0x24f20039

0x24f20038

0x23f20041

0x23f20040

0x23f2003f

0x23f2003e

0x23f2003c

0x23f2003b

0x23f20039

0x23f20037

0x22f20044

0x22f20042

0x22f20040

0x22f2003e

0x22f2003c

0x22f2003b

0x22f20039

0x22f20037

0x21f20044

0x21f20042

0x21f20040

0x21f2003e

0x21f2003c

0x21f2003b

0x21f20039

0x21f20037

0x20d20043

0x20d20041

0x20d2003e

0x20d2003c

0x20d2003a

0x20d20038

0x20d20036

0x20d20034

rev 5 (5 GHz)

0x0f62004a

0x0f620048

0x0f620046

0x0f620044

0x0f620042

0x0f620040

0x0f62003e

0x0f62003c

0x0e620044

0x0e620042

0x0e620040

0x0e62003e

0x0e62003c

0x0e62003d

0x0e62003b

0x0e62003a

0x0d620043

0x0d620041

0x0d620040

0x0d62003e

0x0d62003d

0x0d62003c

0x0d62003b

0x0d62003a

0x0c620041

0x0c620040

0x0c62003f

0x0c62003e

0x0c62003c

0x0c62003b

0x0c620039

0x0c620037

0x0b620046

0x0b620044

0x0b620042

0x0b620040

0x0b62003e

0x0b62003c

0x0b62003b

0x0b62003a

0x0a620041

0x0a620040

0x0a62003e

0x0a62003c

0x0a62003b

0x0a62003a

0x0a620039

0x0a620038

0x0962003e

0x0962003d

0x0962003c

0x0962003b

0x09620039

0x09620037

0x09620035

0x09620033

0x08620044

0x08620042

0x08620040

0x0862003e

0x0862003c

0x0862003b

0x0862003a

0x08620039

0x07620043

0x07620042

0x07620040

0x0762003f

0x0762003d

0x0762003b

0x0762003a

0x07620039

0x0662003e

0x0662003d

0x0662003c

0x0662003b

0x06620039

0x06620037

0x06620035

0x06620033

0x05620046

0x05620044

0x05620042

0x05620040

0x0562003e

0x0562003c

0x0562003b

0x05620039

0x04620044

0x04620042

0x04620040

0x0462003e

0x0462003c

0x0462003b

0x04620039

0x04620038

0x0362003c

0x0362003b

0x0362003a

0x03620039

0x03620038

0x03620037

0x03620035

0x03620033

0x0262004c

0x0262004a

0x02620048

0x02620047

0x02620046

0x02620044

0x02620043

0x02620042

0x0162004a

0x01620048

0x01620046

0x01620044

0x01620043

0x01620042

0x01620041

0x01620040

0x00620042

0x00620040

0x0062003e

0x0062003c

0x0062003b

0x00620039

0x00620037

0x00620035