bcm-v4

[Specification

LP PHY Set RX Gain (u32 gain)

  1. If PHY revision is less than 2
    1. Bitwise AND gain with 1, save as trsw
    2. Calculate the gain bitwise ANDed with 0xFFFC
    3. Calculate the gain bitwise ANDed with 0xC, right shifted by 2
    4. Save the bitwise OR of the two previous steps as lna
    5. Set ext_lna to (gain bitwise ANDed with 2 >> 1)

    6. Maskset PHY Register 0x44D with mask 0xFFFE and set with trsw

    7. Maskset PHY Register 0x4B1 with mask 0xFBFF and set with ext_lna left shifted by 10

    8. Maskset PHY Register 0x4B1 with mask 0xF7FF and set with ext_lna left shifted by 11

    9. Write lna to PHY Register 0x4B6

  2. Otherwise
    1. Bitwise AND gain with 0xFFFF, save result as low_gain
    2. Right shift gain by 16, bitwise AND with 0xF and save as high_gain
    3. Right shift gain by 0x15, bitwise AND with 1, and save as ext_lna
    4. Right shift gain by 2, bitwise AND with 3, and save as tmp
    5. If gain bitwise ANDed with (1 << 20) is zero

      1. Set trsw to 1
    6. Otherwise
      1. Set trsw to 0
    7. Maskset PHY Register 0x44D with mask 0xFFFE and set with trsw

    8. Maskset PHY Register 0x4B1 with mask 0xFDFF and set with ext_lna left shifted by 9

    9. Maskset PHY Register 0x4B1 with mask 0xFBFF and set with ext_lna left shifted by 10

    10. Write low_gain to PHY Register 0x4B6

    11. Maskset PHY Register 0x4B7 with mask 0xFFF0 and set with high_gain

    12. If the current band is 2 GHz
      1. Maskset PHY Register 0x4B1 with mask 0xE7FF and set with tmp left shifted by 11

      2. Maskset PHY Register 0x4E6 with mask 0xFFE7 and set with tmp left shifted by 3

  3. Call LP PHY RX Gain Override Enable with argument 1


Exported/Archived from the wiki to HTML on 2016-10-27