Initialization

1. Perform a Revision 6 B PHY Init

2. If gmode is set
   1. Set the loopback gain to 1

   2. Perform an A PHY Init

3. Write 0 to PHY Register 0x814

4. Write 0 to PHY Register 0x815

5. If PHY Revision is 2

   1. Write 0 to PHY Register 0x811

   2. Write 0xC0 to PHY Register 0x15

6. If PHY Revision is >= 6

   1. 0x400 to PHY Register 0x811

   2. Write 0xC0 to PHY Register 0x15

7. If gmode is set
   1. Check the contained A PHY Revision (at PHY Register offset 0x400), and if it is 3

      1. Write 0x1816 to PHY Register 0x4C2

      2. Write 0x8606 to PHY Register 0x4C3

   2. If it is 5

      1. Write 0x1816 to PHY Register 0x4C2

      2. Write 0x8006 to PHY Register 0x4C3

      3. MaskSet PHY Register 0x4CC with mask 0x00FF and set 0x1F00

8. If the PHY Revision is 2 and gmode is set

   1. Write 0x78 to PHY Register 0x47E

9. If the Radio Revision is 8

   1. Set bit 0x80 in PHY Register 0x801

   2. Set bit 0x4 in PHY Register 0x43E

10. If the loopback gain is not zero

    1. Perform a Loopback Gain measurement

11. If the Radio Revision is not 8

    1. If 2050 Radio Initialization hasn't been run (calibration == 0xFFFF)

       1. Perform a 2050 Radio Initialization now and save

    2. Otherwise

       1. Write the previous result of the calibration to Radio Register 0x78

12. If the saved Minimum TX Bias value hasn't been set yet

    1. Measure the Local Oscillator for G PHYs

    2. If the hardware power control is not zero
       1. Perform the wlc_phy_cal_txpower_stats_clr(...) routine
13. Otherwise
    1. If TX Magnification is enabled (this is a 2050 radio with a Radio Revision of 8)
       1. Take the saved value of the minimum TX Magnification Value and left shift it by 4
       2. OR the result with the Minimum TX Bias

       3. Write the result to Radio Register 0x52

    2. Otherwise

       1. Set the lower 4 bits of Radio Register 0x52 to the Minimum TX Magnification value

    3. If the PHY Revision is 6 or greater

       1. Write the Minimum TX bias to the uppermost 4 bits of PHY Register 0x36

    4. If the BFL_PACTRL board flag is set

       1. Write 0x8075 to PHY Register 0x2E

    5. Otherwise

       1. Write 0x807F to PHY Register 0x2E

    6. Write 0x202 to PHY Register 0x2F

14. If gmode is set

    1. Adjust the LO to the saved attenuation values

    2. Write 0x8078 to PHY Register 0x80F

15. If BFL_RSSI is not set in the Board Flags

    1. Update the NRSSI Table with the current NRSSI Table Delta

    2. Set the NRSSI Threshold for G PHYs

16. Otherwise,
    1. If the gmode is set, and the Minimum and Maximum RSSI values are zero

       1. Determine the NRSSI Offset and NRSSI Slope

    2. Otherwise

       1. Set the NRSSI Threshold for G PHYs

17. If the Radio Revision is 8

    1. Write 0x3230 to PHY Register 0x805

18. Initialize Power Control

19. If OFDM may not be used in the current locale or if the Chip ID is 0x4303

    1. Bitwise AND PHY Register 0x429 with 0xBFFF

    2. Bitwise AND PHY Register 0x4C3 with 0x7FFF