Initalization routine for a B PHY, Revision 5
If the Analog Core Revision is 1
OR Radio Register 0x7A with 0x50
- If the Board Vendor isn't 0x14E4 with a Board Type of 0x416
- Loop 31 times, start with offset 0xA8 and value 0x2120
Write the value to the PHY Register offset
- Increment the offset and add 0x202 to the value
- Loop 31 times, start with offset 0xA8 and value 0x2120
MaskSet PHY Register 0x35 with mask 0xF0FF and set 0x700
- If this is a 0x2050 Radio
Write 0x667 to PHY Register 0x38
If Core Flags has the G Mode Enable flag (0x20000000) set or the PHY Revision is 2 or greater
- If this is a 0x2050 Radio
OR Radio Register 0x7A with 0x20
OR Radio Register 0x51 with 0x4
Write 0 to Core Register 0x3E2
OR PHY Register 0x802 with 0x100
OR PHY Register 0x42B with 0x2000
Write 0x186A to PHY Register 0x1C
MaskSet PHY Register 0x13 with mask 0xFF and set 0x1900
MaskSet PHY Register 0x35 with mask 0xFFC0 and set 0x64
MaskSet PHY Register 0x5D with mask 0xFF80 and set 0xA
Write 0 to PHY Register 0x5B
Write 0 to PHY Register 0x5C
- If this is a 0x2050 Radio
- If "bad frames preemption" is enabled (default off, user controlled)
Turn on bit 12 in PHY Register 0x401
If the Analog Core Revision is 1
Write 0xCE00 to PHY Register 0x26
Write 0x3763 to PHY Register 0x21
Write 0x1BC3 to PHY Register 0x22
Write 0x6F9 to PHY Register 0x23
Write 0x37E to PHY Register 0x24
- Otherwise
Write 0xCC00 to PHY Register 0x26
Write 0xC6 to PHY Register 0x30
Write 0x3F22 to Core Register 0x3EC
If the Analog Core Revision is 1
Write 0x3E1C to PHY Register 0x20
- Otherwise
Write 0x301C to PHY Register 0x20
If the Analog Core Revision is 0
Write 0x3000 to Core Register 0x3E4
- Back up the current channel
- Force to channel 7, even if it's not supported
- If this isn't a 0x2050 Radio
Write 0x80 to Radio Register 0x75
Write 0x81 to Radio Register 0x79
Write 0x20 to Radio Register 0x50
Write 0x23 to Radio Register 0x50
- If this is a 0x2050 Radio
Write 0x20 to Radio Register 0x50
Write 0x70 to Radio Register 0x5A
Write 0x7B to Radio Register 0x5B
Write 0xB0 to Radio Register 0x5C
OR Radio Register 0x7A with 0x7
- Restore the channel
Write 0x80 to PHY Register 0x14
Write 0xCA to PHY Register 0x32
Write 0x88A3 to PHY Register 0x2A
- Set TX power using the saved attenuation values
- If this is a 0x2050 Radio
Write 0xD to Radio Register 0x5D
MaskSet Core Register 0x3E4 with mask 0xFFC0 and set 0x4