GPHY All Gains ( u16 lna, u16 pga, int tr, bool itx)
- If PHY revision is 1
- Set addr to 0x414
- Set offset to 16
- Otherwise
- Set addr to 0x401
- Set offset to 8
If the board flags have bit 0x1000 set and PHY revision >= 7
Set bit 0x0800 in PHY Register 0x811
- If lna is 3
- Set lna to 2
Clear bit 0x8000 in PHY Register 0x812
- Otherwise
Set bit 0x8000 in PHY Register 0x812
- Loop 4 times with i as loop index
Call APHY Write Table Entry with ( addr, i, lna ) as arguments
- Loop 16 times with i as loop index
Call APHY Write Table Entry with ( addr, i + offset, lna ) as arguments
- If tr is not -1
Call GPHY TR Switch with ( tr, 0 ) as arguments
- If itx
Save PHY Registers 0x811 and 0x812
Clear bit 0x0004 in PHY Register 0x812
Set bit 0x0004 in PHY Register 0x811
Do a Dummy Transmission with arguments ( 0, 1 )
Restore PHY Registers 0x811 and 0x812
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